The present invention relates to timing measurements, and more particularly to a timing measurement for a jitter display to show jitter in data edges for each bit of a multi-bit digital word due to path differences, temperature variations and the like.
In the world of electronics there are always imperfections in an otherwise perfect design. Electrical noise, such as that created by thermally generated random movement of electrons, cannot be eliminated at room temperature. All such electrical noise causes a timing or data bit pulse to jitter a few nanoseconds from one pulse to the next. Also each data bit or timing pulse path may be slightly different in length, resulting in an average deviation from a reference value by each path which is in addition to the jitter. In a digital video television system, such as that defined by the CCIR-601 standard, data is processed in the form of digital words with each bit traveling over a separate conductive path. As a result of path differences and other factors the digital bits making up a data word are skewed with respect to each other and a data clock associated with the data. Ideally the leading edge of each clock pulse of the data clock occurs exactly at the middle of each digital bit of the data word. The digital television standard may provide a limit for data clock jitter, such as +/-3 nanoseconds, and a limit for data digital bit jitter and skew with respect to the data clock, such as +/-8 nanoseconds.
What is desired is a means for determining these variations from the ideal introduced by a practical electronic processing system for display so that an operator can determine whether a digital system is operation within its specifications.